I am specialized in design verification. My goal is to provide customers the highest quality of work, and at the same time save them time and money. I can turn around customers' design projects in a timely manner.
I did verification methodology and verified the functionality of the chips successfully in the past. I had over 16 years of engineering experience. Most of the time, I was brought in to provide the design verification methodology and verify the functionality of the chips successfully. As a result, I ended up saving the companies that I worked for money without spinning the chips numerous times.
I was an expert in design verification using UVM, SystemVerilog, Verilog, VERA, and VHDL test benches in the VCS and ModelSim environment. I was an expert in design coverage using ModelSim Coverage, Covermeter, Surecov, Suresight, and Surelint. I was proficient in using PERL, assembly, “C”, and “C++” programming language. I was proficient in using Synplify, Virsim, Simwave, and Design Compiler.
Since the hardware industry is not as demanding, I have pick up some software skills similiar to my past working experience. I have picked up software skills in Java, Hive, Pig, and Hbase in Hadoop 2nd generation ecosystem and Java development in Android operating system. I had done numerous projects as proof of concept to prove that I can do software development and software validation.